Thanks for the answer. I may - may - have felt a thrum of “fanatical pride” reading it. (You know, that "Holy crap the big boss just talked to me " kinda vibe? Whatever you want to call it.)
Hope that brings christmas cheer to your heart.
Do you have any interest in the architectural elements of the problems that Curio and SLY ostensibly tackle?
You’ve made me wonder, to what degree can asynchronous functionalities be lifted to the chip itself, where multitasking is genuinely attainable. (I’m sure there’s some terrible price to be paid, but you’ve got me on the where or why. Feels like a hardware problem best solved by hardware solutions. Then again, my ramen noodles caught on fire like an hour ago, which is apparently a thing that can happen.)
In a simliar vein, what stops us from building high-level parsers and lexers out of silicon? It would be nice to have components that supported algebras directly over instruction sets, for example. Maybe an array of these could cast various masks over the real instruction set. Quick and efficient emulation of arbitrary virtual machines being “the dream” there, I suppose.